<%--Added BazzarVoice(bzVoiceCommerce.html) for Tag Management of 13.2.2 on 15/03/13--%>

Design Tools: ADIsimOpAmp (Amplifier Parametric Evaluation Tool)

An applet for demonstrating stability effects in opamp buffers.
Instructions | Troubleshooting | Related Information
This page requires Java Pug-in Ver 1.6 or higher to view it properly. Click here to download and install the latest Java Plug-in from the internet.

Instructions DISCLAIMER: For educational purposes only.

Condensed from the Analog Dialogue article by Grayson King

Usually, driving large capacitive loads is not a matter of choice: most often it's an unwanted parasitic, such as the capacitance of a length of coaxial cable. However, situations do arise where it's desirable to decouple a dc voltage at the output of an op amp-for example,when an op amp is used to invert a reference voltage and drive a dynamic load. In this case, you might want to place bypass capacitors directly on the output of an op amp. Either way, a capacitive load affects the op amp's performance.

In fact, load capacitance can turn your amplifier into an oscillator. Op amps have an inherent output resistance, Ro, which, in conjunction with a capacitive load, forms an additional pole in the amplifier's transfer function. As the Bode plot shows, at each pole the amplitude slope becomes more negative by 20 dB/ decade. Notice how each pole adds as much as -90° of phase shift. We can view instability from either of two perspectives. Looking at amplitude response on the log plot,circuit instability occurs when the sum of open-loop gain and feedback attenuation is greater than unity. Similarly, looking at phase response, an op amp will tend to oscillate at a frequency where loop phase shift exceeds -180°, if this frequency is below the closed-loop bandwidth. The closed-loop bandwidth of a voltage-feedback op amp circuit is equal to the op amp's bandwidth product (GBP, or unity-gain frequency), divided by the circuit's closed loop gain (ACL).

Schematic of noninverting buffer with load Graph of reduced phase margin
Click to demonstrate loss of phase margin

Phase margin of an op amp circuit can be thought of as the amount of additional phase shift at the closed loop bandwidth required to make the circuit unstable (i.e., phase shift + phase margin = -180°). As phase margin approaches zero, the loop phase shift approaches -180° and the op amp circuit approaches instability. Typically, values of phase margin much less than 45° can cause problems such as "peaking" in frequency response, and overshoot or "ringing" in step response. In order to maintain conservative phase margin, the pole generated by capacitive loading should be at least a decade above the circuit's closed loop bandwidth. When it is not, consider the possibility of instability.

The first step in managing potential instability is to determine whether the op amp can safely drive the load on its own. Many op amp data sheets specify a "capacitive load drive capability". Others provide typical data on "small-signal overshoot vs. capacitive load". In looking at these figures, you'll see that the overshoot increases exponentially with added load capacitance. As it approaches 100%, the op amp approaches instability. If possible, keep it well away from this limit. Also notice that this graph is for a specified gain. For a voltage feedback op amp, capacitive load drive capability increases proportionally with gain. So aVF op amp that can safely drive a 100-pF capacitance at unity gain should be able to drive a 1000-pF capacitance at a gain of 10.

A few op amp data sheets specify the open loop output resistance (Ro), from which you can calculate the frequency of gain-the added pole as described above. The circuit will be stable if the frequency of the added pole (fP) is more than a decade above the circuit's bandwidth.

If the op amp's data sheet doesn't specify capacitive load drive or open loop output resistance, and has no graph of overshoot versus capacitive load, then to assure stability you must assume that any load capacitance will require some sort of compensation technique. There are many approaches to stabilizing standard op amp circuits to drive capacitive loads. Here are a few:

Noise-gain manipulation: A powerful way to maintain stability in low-frequency applications-often overlooked by designers-involves increasing the circuit's closed-loop gain (a/k/a "noise gain") without changing signal gain,thus reducing the frequency at which the product of open-loop gain and feedback attenuation goes to unity. Some circuits to achieve this, by connecting RD between the op amp inputs, are shown below. The "noise gain" of these circuits can be arrived at by the given equation.

Schematic showing use of Rd compensation

Since stability is governed by noise gain rather than by signal gain, the above circuits allow increased stability without affecting signal gain. Simply keep the "noise bandwidth" (GBP/ANOISE) at least a decade below the load generated pole to guarantee stability.

Loop-gain Bode plot for Rd compensation
Click here to demonstrate noise-gain (RD) manipulation

One disadvantage of this method of stabilization is the additional output noise and offset voltage caused by increased amplification of input-referred voltage noise and input offset voltage. The added dc offset can be eliminated by including CD in series with RD, but the added noise is inherent with this technique. The effective noise gain of these circuits with and without CD are shown in the figure.

CD, when used, should be as large as feasible; its minimum value should be 10 ANOISE/(2 pRDGBP) to keep the "noise pole" at least a decade below the "noise bandwidth".

Out-of-loop compensation: Another way to stabilize an op amp for capacitive load drive is by adding a resistor, RX, between the op amp's output terminal and the load capacitance, as shown below. Though apparently outside the feedback loop, it acts with the load capacitor to introduce a zero into the transfer function of the feedback network, thereby reducing the loop phase shift at high frequencies.

Schematic showing Rx compensation Graph showing results of Rx compensation
Click here to demonstrate out-of-loop (RX) compensation

To ensure stability, the value of RX should be such that the added zero (fZ) is at least a decade below the closed loop bandwidth of the op amp circuit.With the addition of RX,circuit performance will not suffer the increased output noise of the first method, but the output impedance as seen by the load will increase. This can decrease signal gain, due to the resistor divider formed by RX and RL. If RL is known and reasonably constant, the results of gain loss can be offset by increasing the gain of the op amp circuit.

This method is very effective in driving transmission lines. The values of RL and RX must equal the characteristic impedance of the cable (often 50ohms or 75ohms) in order to avoid standing waves. So RX is pre-determined, and all that remains is to double the gain of the amplifier in order to offset the signal loss from the resistor divider. Problem solved.

In-loop compensation: If RL is either unknown or dynamic, the effective output resistance of the gain stage must be kept low. In this circumstance, it may be useful to connect RX inside the overall feedback loop, as shown below. With this configuration, dc and low-frequency feedback comes from the load itself, allowing the signal gain from input to load to remain unaffected by the voltage divider, RX and RL.

Schematic showing in-loop compensation

The added capacitor, CF, in this circuit allows cancellation of the pole and zero contributed by CL. To put it simply, the zero from CF is coincident with the pole from CL, and the pole from CF with the zero from CL. Therefore, the overall transfer function and phase response are exactly as if there were no capacitance at all. In order to assure cancellation of both pole/ zero combinations, the above equations must be solved accurately. Also note the conditions; they are easily met if the load resistance is relatively large.

Calculation is difficult when RO is unknown. In this case, the design procedure turns into a guessing game-and a prototyping nightmare.A word of caution about SPICE:SPICE models of op amps don't accurately model open-loop output resistance (RO); so they cannot fully replace empirical design of the compensation network.

It is also important to note that CL must be of a known (and constant) value in order for this technique to be applicable. In many applications, the amplifier is driving a load "outside the box," and CL can vary significantly from one load to the next. It is best to use the above circuit only when CL is part of a closed system.

One such application involves the buffering or inverting of a reference voltage, driving a large decoupling capacitor. Here, CL is a fixed value, allowing accurate cancellation of pole/zero combinations. The low dc output impedance and low noise of this method (compared to the previous two) can be very beneficial. Furthermore, the large amount of capacitance likely to decouple a reference voltage (often many microfarads) is impractical to compensate by any other method.

All three of the above compensation techniques have advantages and disadvantages. You should know enough by now to decide which is best for your application. All three are intended to be applied to "standard", unity gain stable, voltage feedback op amps. Read on to find out about some techniques using special purpose amplifiers.


back to top

Troubleshooting

Netscape 4.X platforms may fail to execute this applet properly. We recommend upgrading to a more recent browser.

On some platforms, adding whitespace to a numeric field causes a "Not a valid number" error message to pop up.

For further troubleshooting information, please visit our Interactive Tools troubleshooting page.


back to top

Related Information

Driving Capacitive Loads, Analog Dialogue


back to top

沪ICP备09046653号
Send Feedback X
content here.
content here.

Send Feedback

Close
Email Facebook Linkedin Twitter Google +1